SDG Detail

EE 213: Digital MOS Integrated Circuits

Postgraduate course

Project description

Looks a little more deeply at how digital circuits operate, what makes a gate digital, and how to "cheat" to improve performance or power. To aid this analysis we create a number of different models for MOS transistors and choose the simplest one that can explain our the circuit's operation, using both hand and computer analysis. We explore static, dynamic, pulse-mode, and current mode logic, and show how they are are used in SRAM design. Topics include sizing for min delay, noise and noise margins, power dissipation. The class uses memory design (SRAM) as a motivating example. DRAM and EEPROM design issues are also covered.